Some personal computers (PC) employ a hard disk device as a secondary storage device. In such PCs, a technology is known for backing up data that has been stored in the hard disk device to prevent the data from becoming invalid because of some failure. For example, when act of changing data in the hard disk device is detected, a snapshot as a backup copy of the data before the change is taken and a log of changes made to the data is generated. Then, processing for taking a new snapshot, invalidating a log taken in the past before the new snapshot was taken, and generating a new log is repeated at every predetermined time (see, for example, US Patent Application Publication No. 2006/0224636). In case data becomes invalid due to some reason, the data can be restored by referring to the snapshot and the log.
In recent years, a capacity of a NAND flash memory as a nonvolatile semiconductor storage device has been increased dramatically. As a result, PCs including a memory system having the NAND flash memory as a secondary storage device have been put to practical use. However, the technology disclosed in US Patent Application Publication No. 2006/0224636 cannot be applied to backup of data stored in such a personal computer having the NAND flash memory as the secondary storage device as in the case of backup of data stored in the personal computer having the hard disk device as the secondary storage device. This is because a multi-value memory technology that can store a plurality of data (multi-value data) equal to or larger than 2 bits in one memory cell is employed to increase the capacity of the NAND flash memory.
A memory cell configuring a multi-value memory has a field effect transistor structure having a stacked gate structure in which a gate insulating film, a floating gate electrode, an inter-gate insulating film, and a control gate electrode are stacked in order on a channel region and a plurality of threshold voltages can be set according to the number of electrons accumulated in the floating gate electrode. In order to make it possible to perform multi-value storage based on the plurality of threshold voltages, the distribution of a threshold voltage corresponding to one data needs to be made extremely narrow.
For example, as a multi-value memory that can store four values, there is a multi-value memory that includes a lower order page and a higher order page in one memory cell and stores 2 bits (four values) by writing 1-bit data in the respective pages. In a method of writing data in such a multi-value memory, after data is written in a lower order page of a first memory cell, data is written in a lower order page of a memory cell (a second memory cell) that is adjacent to the first memory cell. After data is written in this adjacent memory cell, data is written in a higher order page of the first memory cell (see, for example, JP-A 2004-192789 (KOKAI)).
However, in such a multi-value memory, a threshold voltage of the first memory cell in which data has been written earlier fluctuates because of a threshold voltage of the second memory cell in which the data is written later and that is adjacent to the first memory cell. Therefore, in the multi-value memory, it is likely that lower order page breakage occurs in which, if writing is suspended because of, for example, abnormal isolation of a power supply while data is being written in a higher order page of a certain memory cell, data in a lower order page in which the data is written earlier is also broken.
Therefore, in the personal computer employing the NAND flash memory, for example, when the memory system is reset from the abnormal isolation of the power supply or the like, it is necessary to reset the memory system to a state before the abnormal isolation occurs by distinguishing timing of the suspension or, when the wiring is suspended during writing of a log, distinguishing presence or absence of log breakage and selecting a log not affected by the suspension and reflecting the log on a snapshot. However, even if such restoration processing is performed, the broken log is still present. Therefore, there is a problem in that likelihood that the broken log is read by mistake after the resetting cannot be eliminated and reliability of the memory system is not secured.
In the memory system having the NAND flash memory, when data is stored, it is necessary to once erase a writing area, for example, in a unit called block and thereafter perform writing in a unit called page. On the other hand, when data is stored, it is necessary to once erase a writing area in, for example, a unit called block and then perform writing in a unit called page. On the other hand, there is a problem in that, as the number of times of erasing for a block performed prior to such writing of the data, deterioration in a memory cell configuring the block worsens. In other words, there is a limit in the rewritable number of times of respective blocks. Therefore, suppression of the number of times of erasing of the blocks is indispensable for an extension of the durable life of the memory system. As one of measures against such a problem, for example, processing called wear leveling for dispersing update portions of data as equally as possible is performed such that the numbers of times of erasing of all the blocks in the memory system are substantially equal.
When a signal for standby, sleep, or reset is generated in the personal computer or the like, in the conventional method for storing the snapshot and the log, the snapshot is taken before the memory system shifts to a designated state. For example, when the standby signal is received, management information concerning the memory system is stored by taking the snapshot again.
Subsequently, the memory system shifts to a standby state. After the memory system is reset from the standby state, the management information is restored by using the stored snapshot. The memory system is restored to a state before the shift to the standby state based on this management information.
When the method of taking the snapshot again every time the standby signal or the like is received is applied the memory system having the NAND flash memory, there is a problem in that the durable life of the memory system is reduced according to an increase in the number of times of acquisition of the snapshot. This is because, in acquiring the snapshot, since a block as a storage area for management information is erased first and then the management information is written in the block, the memory cell is deteriorated by the erasing of the block. When the memory cell shifts to the standby state after the standby signal or the like is received and the snapshot is taken again, since it takes time to create the snapshot, there is a problem in that waiting time until the shift to the standby state or the like is long.